SMARTVLSI: LOW-POWER HIGH-SPEED DESIGN FOR CONVOLUTIVE BLIND SOURCE SEPARATION

Abstract

Convolutive Blind Source Separation (CBSS) is a fundamental technique in signal processing, with applications in audio processing, biomedical signal analysis, and communications. However, implementing CBSS algorithms efficiently in hardware poses challenges due to high computational complexity and power consumption. This study presents SmartVLSI, a low-power, high-speed VLSI architecture optimized for CBSS applications. The proposed design leverages parallelism, pipelining, and resourceefficient arithmetic units to reduce latency and energy consumption while maintaining accurate source separation. Simulation results demonstrate significant improvements in processing speed, power efficiency, and area utilization compared to conventional CBSS hardware implementations. The findings highlight the potential of the SmartVLSI design for real-time, energy-efficient signal separation in embedded systems and portable devices.